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ELEC0009: Analog Electronics


1.

The amplifier circuit shown in Figure 1.1 consists of two single stage common source amplifiers separated from each other by ๐ถ2. Consider ยต๐‘›๐ถ๐‘œ๐‘ฅ = 150 ยตA โˆ™ V โˆ’2 , ๐‘‰๐‘‡๐ป = 0.5 V and ๐‘Ÿ๐‘œ = โˆž for ๐‘€1 and ยต๐‘๐ถ๐‘œ๐‘ฅ = 50 ยตA โˆ™ V โˆ’2 , ๐‘‰๐‘‡๐ป = โˆ’0.5 V and ๐‘Ÿ๐‘œ = โˆž for ๐‘€2 . You may ignore all other second order effects and assume reasonable values for any other parameters required. Select appropriate values for the passive components in Figure 1.1 (๐‘…1, ๐‘…2, ๐‘…3, ๐‘…4, ๐‘…๐ท1, ๐‘…๐ท2, ๐‘…๐‘†1 ๐‘…๐‘†2, ๐ถ1, ๐ถ2, ๐ถ3), and appropriate value for ( ๐‘Š ๐ฟ ) ratio associated with each MOSFET, where ๐‘Š is the width of the transistor and ๐ฟ is the channel length, to ensure that transistors are biased in saturation region and |๐ด๐‘€| > 5, where ๐ด๐‘€ is the mid-band value of the overall small signal gain of the circuit (๐‘ฃ๐‘œ๐‘ข๐‘ก ๐‘ฃ๐‘–๐‘› ). Justify your selected values for all design parameters and demonstrate that all design criteria are met. [15 marks]



2.

Consider the BJT circuit shown in Figure 2.1 where ๐‘…๐‘ ๐‘–๐‘” = 10 kโ„ฆ, ๐‘…๐ต = 50 kโ„ฆ, ๐‘…๐ถ = 5 kโ„ฆ, ๐‘‰๐ถ๐ถ = 5 V , ๐‘‰๐ธ๐ธ = โˆ’5 V , ๐ถ1 = ๐ถ2 = ๐ถ3 = 1 ยตF , ๐ผ๐ต๐ผ๐ด๐‘† = 1 mA and for ๐‘„1 , ๐‘‰๐ต๐ธ = 0.65 V , ๐‘‰๐ด = 80 V, ๐›ฝ = 150, ๐ถยต = 2 pF and ๐ถ๐œ‹ = 3 pF and ๐‘Ÿ๐‘ฅ = 20 โ„ฆ. ๐ด is a secondary gain stage whose input impedance (๐‘๐‘–๐‘›) is formed of a parallel combination of an input resistance (๐‘…๐‘–๐‘›) and an input capacitance (๐ถ๐‘–๐‘›) where ๐‘…๐‘–๐‘› = 10 ๐‘˜โ„ฆ and ๐ถ๐‘–๐‘› = 5 pF. The transfer function of ๐ด (i.e. ๐ด(๐‘ )) is shown below where the voltage across ๐‘๐‘–๐‘› is multiplied by ๐ด(๐‘ ) to find ๐‘ฃ๐‘œ๐‘ข๐‘ก. Assume operation at room temperature.

(a) Find the mid-band magnitude[7 marks]

(b) Using appropriate methods,

(i) find all low frequency break frequencies associated with the circuit, [4 marks]

(ii) find all high frequency break frequencies associated with the circuit, [5 marks] (iii) plot the overall magnitude Bode plot of ๐‘ฃ๐‘œ๐‘ข๐‘ก ๐‘ฃ๐‘ ๐‘–๐‘” within the appropriate frequency range while clearly indicating break frequencies and slopes. [4 marks]

(iii) plot the overall magnitude Bode plot within the appropriate frequency range while clearly indicating break frequencies and slopes. [4 marks]



3.

Consider the ideal series-shunt feedback circuit shown in Figure 3.1 in which amplifier ๐ด may be characterised

(a) Select appropriate values for the resistors ๐‘…1, ๐‘…2, ๐‘…3 and ๐‘…4 to set ฮฒโ‰ˆ0.0005. [6 marks]

(b) Derive the expression for the gain of the feedback circuitas a function of ๐‘  for ฮฒ=0.0005. [3 marks]

(c) Compare the mid-band gain-bandwidth product of the feedback circuit for ฮฒ=0.0005 with that of ๐ด in open-loop setting. [6 marks]



4.

Consider the circuit in Figure 4.1. The parameters are ๐‘‰+= 12 V, ๐‘‰โˆ’= โˆ’12 V, ๐‘…๐ฟ = 100 ฮฉ, and ๐ผBias = 5 mA. The transistor and diode parameters are ๐ผ๐‘† = 10โˆ’13A. The transistor current gains are ๐›ฝ๐‘› = 100 and ๐›ฝ๐‘ = 20 for the npn and pnp devices, respectively.

(a) For ๐‘ฃ๐‘‚ = 0, determine voltage ๐‘‰๐ต๐ต and the quiescent collector current and baseโ€“emitter voltage for each transistor. [8 marks]

(b) For ๐‘ฃ๐‘‚ = 10 V, determine the power delivered to the load and the power dissipated in each transistor. [8 marks]


5.

Consider the bipolar junction transistor op-amp circuit in Figure 5.1. The transistor parameters are: ๐›ฝ(npn) = 110, ๐›ฝ(pnp) = 70, ๐‘‰๐ด = 90 V (all transistors), and the base-emitter turn-on voltage ๐‘‰๐ต๐ธ(on) = 0.65 V (all transistors). The circuit parameters are: ๐‘‰+= 9 V, ๐‘‰โˆ’= โˆ’9 V, ๐ผ๐‘„1 = 30 ฮผA, ๐ผ๐‘„2 = 250 ฮผA, ๐‘…1 = 25 kฮฉ, ๐ถ๐น = 15 pF.

(a) Determine the small-signal differential-mode voltage gain. [8 marks]

(b) Find the differential-mode input resistance. [4 marks]

(c) Determine the unity-gain bandwidth. [5 marks]



6.

Figure 6.1 shows an LC-type oscillator with a bipolar junction transistor ๐‘„1. Assume ๐‘Ÿ๐œ‹ and ๐‘Ÿ๐‘œ of the transistor are both very large and capacitor C is tending to infinity. ๐‘…๐ฟ is the load and ๐ผ is an ideal current source.

(a) Derive the expression for the frequency of oscillation. [7 marks]

(b) Derive the condition of oscillation. [4 marks]

(c) If ๐‘…๐ฟ = 2 kฮฉ, ๐ผ = 2 mA , ๐‘‰+= 5 V and ๐‘‰โˆ’= โˆ’5 V, design the circuit to oscillate at 10 MHz and verify that it will sustain oscillations. [6 marks]























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